FX880P_IO.asm ( Bytes)
; this program is testing some of the functions of the Olimex AVR-MT board ; ================= ; definitions ; ================= .include "tn2313def.inc" .set clock = 10000000 ; === register definitions === .def w = r16 ; working register .def _w = r17 ; working register for interrupts .def a0 = r18 ; argument for subroutines .def data = r19 .def const = r20 .def a = r21 .def b = r22 .def c = r23 .def zaehl = r24 ; count register .def r = r25 ; ================== ; main program ; ================== reset: ldi w, RAMEND ; load stack pointer SP ; ldi w, 100 out SPL,w ldi w, 255 ; prepare Port B for LED output out DDRB, w out PORTB, w rcall uart_receive_init ; rcall wait_ms ; wait 5ms ldi const, 48 ldi XL, 10 ldi XH, 100 flush: ; clears UART buffer sbis UCSRA, RXC rjmp main in r16, UDR rjmp flush main: ldi a,0 ldi b,0 ldi c,0 ldi data,0 ldi w,0 main2: ldi zaehl, 0 sbis UCSRA, RXC ; Wait for data to be received rjmp main2 in w, UDR ; Get received data from buffer cpi w,32 ; "Preamble" 32 ? brne flush ; if not... first: sbis UCSRA, RXC ; Wait for first data byte rjmp first in a, UDR ; Get received data from buffer second: sbis UCSRA, RXC ; Wait for second data byte rjmp second in b, UDR ; Get received data from buffer mov w,b cpi w,32 ; "End" 32 ? breq calc1 ; third: sbis UCSRA, RXC ; Wait for third data byte rjmp third in c, UDR ; Get received data from buffer mov w,c cpi w,32 ; "End" 32 ? breq calc2 ; th3: sbis UCSRA, RXC rjmp th3 in w, UDR rjmp calc3 calc1: ; Einer sub a, const add data, a rjmp output calc2: ; Zehner + Einer sub a, const ; Umwandlung nach dezimal sub b, const calc21: cpi a, 0 breq calc22 add data, XL ; data = data + 10 dec a rjmp calc21 calc22: add data, b rjmp output calc3: ; Hunderter + Zehner + Einer sub a, const sub b, const sub c, const calc31: cpi a,0 breq calc32 add data, XH ; data = data + 100 dec a rjmp calc31 calc32: cpi b,0 breq calc33 add data, XL ; data = data + 10 dec b rjmp calc32 calc33: add data, c ; rjmp output output: mov w, data com w out PORTB, w rjmp flush ; =================== ; wait routines ; =================== wait_1000ms: ; wait 1000 miliseconds (ms) rcall wait_500ms wait_500ms: ; wait 500 miliseconds (ms) rcall wait_250ms wait_250ms: ; wait 250 miliseconds (ms) ldi w,250 rcall wait_ms ret wait_ms: ; wait "w" miliseconds (ms) push w rcall wait_1000us pop w dec w brne PC-4 ret wait_1000us: ; wait 1000 microseconds (us) rcall wait_500us wait_500us: ; wait 500 microseconds (us) rcall wait_250us wait_250us: ; wait 250 microseconds (us) ldi w,249 rcall wait_us ret wait_us: ; wait "w" microseconds (us) ; in w dec w rcall wait7 brne PC-2 ret wait7: ret ; wait 7 cycles ; ========================= ; UART receiver routines ; ========================= uart_receive_init: ldi r17, 0 ; 2400Baud @ 3,6864MHz ldi r16, 95 out UBRRH, r17 ; Set baud rate out UBRRL, r16 ldi r16, (1<<UCSZ1)|(1<<UCSZ0)|(1<<USBS) ; Set frame format: 8data, 2stop bits out UCSRC,r16 ldi r16, (1<<RXEN) ; Enable receiver out UCSRB,r16 ret
(c) by mani.becker@web.de - http://blog.manib.bplaced.net